Impact Factor (2025): 6.9
DOI Prefix: 10.47001/IRJIET
Three-dimensional
integrated systems employing vertical stacking technology and through-silicon
via (TSV) interconnects offer enhanced performance and reduced power
consumption. However, TSV technology introduces elector-thermal coupling
phenomena, compromising the reliability and efficiency of these systems. This
study provides a comprehensive review of simulation design advancements for
elector-thermal coupling in TSV-based three-dimensional integrated circuits.
Electrical and thermal simulation methodologies are elucidated and potential
impacts and mitigation strategies are thoroughly explored. A systematic
analysis is presented to elucidate the challenges and optimization
opportunities in elector-thermal coupling, informing future research
directions.
Country : China / Pakistan
IRJIET, Volume 8, Issue 10, October 2024 pp. 168-177